1. Field of the Invention
The present invention generally relates to a semiconductor device and a method for manufacturing the same. More particularly, the invention relates to a semiconductor device structured suitably to have contacts self-aligned therein, as well as to a method for manufacturing that semiconductor device.
2. Description of the Background Art
Along with the ever-growing scale in recent years of circuit integration in semiconductor devices has come wiring patterns getting more minuscule than ever before. The trend is making it progressively difficult to ensure the precision of wiring patterns by merely raising the accuracy of masking for photoresist. Illustratively, with memory cells getting finer than ever, boosting the masking accuracy is increasingly liable to fail in having contacts fabricated on such memory devices as DRAMs without short-circuiting their wiring. One known method for producing contacts without developing short-circuits with wiring has recourse to what is known as self-alignment. The conventional self-alignment method will now be described with reference to FIGS. 29 through 31.
Manufacturing contacts conventionally by self-alignment involves first forming an insulating film 12 on a silicon substrate 10 as shown in FIG. 29. On top of the insulating film 12 are formed silicon wiring 14 and nitride film top walls 16.
As shown in FIG. 30, nitride film side walls 18 to protect the silicon wiring 14 are formed laterally onto the silicon wiring 14 and the nitride film top walls 16. At this stage, the silicon wiring 14 is covered with the nitride films 16 and 18.
An interlayer oxide film 20 (see FIG. 31) is deposited all over the silicon substrate 10, being masked at suitable portions by photoresist and being subjected to an oxide film etching process. This produces contact holes 22. The oxide film etching process is done in a manner that causes removing the oxide film 20 at a sufficient selective ratio to nitride film. That is, the nitride film top walls 16 and nitride film side walls 18 remain virtually undamaged by the etching.
If the portions not masked by photoresist are sufficiently wide relative to the pitch of the silicon wiring 14, not only the interlayer oxide film 20 but also the nitride films 16 and 18 would be involved in an subjected area of the etching in the midst of the process. In this case, the nitride films 16 and 18 act as stoppers against the oxide film etching whose progress is impeded thereby. This manufactures contact holes 22 opened to the surface of the silicon substrate 10 without exposing the silicon wiring 14, as shown in FIG. 31.
A silicon film is then deposited in the contact holes 22 and formed to a desired shape. As a result, contacts 24 that conduct to the silicon substrate 10 are produced as depicted in FIG. 31. As described, the self-alignment method involves making contact holes through etching between wiring patterns while protecting these patterns with stopper films. The above method enables to manufacture desired contacts in a stable manner regardless of some errors in alignment between photoresist openings and wiring patterns.
According to the conventional method, however, part of the spaces between the silicon wires 14 are inevitably occupied by the nitride film side walls 18. This reduces the widths of the contacts 24 formed between the silicon wires 14, which makes it difficult to diminish the contact resistance between the contacts 24 and the silicon substrate 10. In other words, a major problem with the conventional self-alignment method, despite its advantage in forming the contacts 24 stably, is a tendency to increase the contact resistance between the contacts 24 and the silicon substrate.